Tcl Perl Python Static Design Checks Synthesis and timing analysis

Tcl Perl Python C/c++ Systemverilog

Perl Tcl Python Circuit Simulation Sram/memory Designs

C C++ Tcl Perl Python embedded operating systems

Embedded System Hardware Tcl Perl Python Embedded C

C C++ Assembler Amba Python

Perl Tcl C Shell Pytho Systemverilog

Verilog Hdl Perl Python Arm System Architectures Pcie

Oracle Erp Cloud Oracle Ebs Financials Fah Project Management

Unix Linux Verilog Rtl Tcl Perl

Tcl Perl Python Fpga C++

Oracle Hcm/hrms Oracle Hcm Cloud

Verilog Hdl Systemverilog verification methodologies

Embedded C C++ embedded operating systems Tcl Perl

C C++ Emulation Prototyping Validation Tcl