ASIC Verilog System Verilog UVM Perl

C C++ System Verilog Xcelium UVM

DOE GD& T Siemens NX 3D CAD JMP

Python PyTorch OpenCV SciPy C++

Oligonucleotide Purification Akta systems Unicorn Synthesis

floorplanning clock tree synthesis timing closure signal integrity IR drop analysis

C C++ hardware and firmware design Altium Eagle

software QA test software verification embedded software apps

Application-Specific Integrate... DDR3 SDRAM Functional Verification Perl Python (Programming Language)

C++ Debugging Digital Designs Functional Verification Perl

Analog Semiconductors Battery Management Systems Electromagnetic Interference (... Electronics Design Embedded Software

AMBA AHB AXI Design Ethernet Functional Verification

Closure Debugging Design Ethernet Functional Verification

Application-Specific Integrate... FPGA prototyping Field-Programmable Gate Arrays... Formal Verification RTL Design

Functional Verification High Performance Computing (HP... Multithreading Perl Python (Programming Language)