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Design Verification Lead
By Tanisha Systems Inc |  Pleasanton, CA, USA

ASIC Computer Simulations GLS HVL SoC

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Design Verification Engineer
By Lancesoft |  Markham, Ontario, Canada

ASIC IP Verification UVM Development AHB/AXI PERL Python

Remote   |     1   |     3+
Design Verification Engineer
By XpertTech,Inc |  Boston, MA, USA

Facebook is the End Client UVM/ System Verilog - sequences driver monitor scoreboard agent development System Verilog OVM/UVM Python Perl Shell scripting assertions (SVA) Digital ASICs Design