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Memory Firmware Engineer
By Lancesoft | Boxborough, MA, USA
C++ DDR SDRAM Firmware Logic Design Python
Analog Design Engineer
By Lancesoft | San Diego, CA, USA
Analog Circuit Design Physical design STA Tcl Spectre
Design Verification Engineer
By Lancesoft | Markham, Ontario, Canada
ASIC IP Verification UVM Development AHB/AXI PERL Python
Design Verification Engineer
By XpertTech,Inc | Boston, MA, USA
Facebook is the End Client UVM/ System Verilog - sequences driver monitor scoreboard agent development System Verilog OVM/UVM Python Perl Shell scripting assertions (SVA) Digital ASICs Design