Senior Validation Engineer

KEY RESPONSIBILITIES:

• Driving technical innovation to improve Our capabilities across product development and validation, including tool and script development, technical and procedural methodology enhancement, and various internal and cross-functional initiatives.

• End-to-end IP ownership of developing, documenting, and executing on verification test plans.

• Debug issues found during verification cycle starting SOC bring-up to on-shelf date.

• Working with multiple teams and tracking test execution to make sure all features are validated and optimized on time.

• Working closely with different supporting technical teams (SW and HW).

PREFERRED EXPERIENCE:

• Experience with board/platform-level debug, including delivery, sequencing, analysis, optimization, and debug methodologies.

• Knowledge of system architecture, technical debug, and validation strategies.

• Strong programming/scripting skills (e.g., C/C++, Ruby, Python).

• Extensive experience with ASIC/ system debug techniques and methodologies.

• Extensive experience with common lab equipment, including protocol/logic analyzers, oscilloscopes, etc.

ACADEMIC CREDENTIALS:

• Bachelor’s or master’s degree in electrical or computer engineering.