Staff/Principal Debug Architect -RTL Design

Job Description:

Arm designs the technology that is at the heart of sophisticated digital products, from wireless networking and consumer entertainment solutions to imaging, automotive, security, and storage devices. Arm improves people’s lives by enabling the intelligence in affordable, easy-to-use electronic products that transform the way we live and work. We work in partnership with a global network of leading technology companies that are using our experienced low-power technology.

As a Principal Design Engineer, you will be a key contributor/leader in versatile RTL design team. You will own microarchitecture, RTL design, methodologies, process, planning, etc. for CPU coherency IP of high-performance, energy-efficient microprocessors.

Responsibilities include

• Develop SOC debug microarchitecture by collaborating with Debug Architects, hardware, and software teams.
• Design and implement innovative and efficient debug mechanisms to cover functionality, performance, and power metrics.
• Verilog and SystemVerilog RTL development and debug and RTL quality
• Working closely with validation and implementation teams to meet all functional requirements, performance, power and area goals
• Planning, tracking, and partner communication
• Refining methodologies/process to improve efficiency/quality

Required Skills and Experience :

• Expertise with Design for Debug (DFD) techniques such as observability points, trace buffers, and error detection mechanisms
• Proficiency with ARM-specific debug solutions such as CoreSight, Debug Access Ports (DAPs), Embedded Trace Macrocells (ETMs), System Trace Macrocells (STMs) and standards such as ARM Debug Interface Architecture Specification
• Strong background in digital design, RTL coding (Verilog/VHDL), and ASIC/FPGA debug methodologies
• Conversant with Lint/CDC/RDC flows and analysis
• 8+ Years of relevant work experience in developing/leading SOCs/Subsystems.
• Good communication (written, verbal, presentations) skills

“Nice To Have” Skills and Experience :

• Exposure to SOC architecture and design!