Job Code : EWC - 1135
Required Skills:
· Hands-on experience of complete verification cycle with strong verification concepts
· Strong knowledge of Verilog, SystemVerilog and UVM
· Experience in UVM based Verification IP development
· Experience in AMBA AXI/AHB/APB System buses.
· Hands on work experience on any of PCIe/Eth/USB/DDR etc.
· Hands on experience with System Verilog Assertions
· Scripting for automation, release process, simulations, regressions
ANY GRADUATE