Cadence Engineer

Description:

Experience Required:

• Minimum of 7 years’ experience with complex analog, power, high speed digital, or RF PWB designs
• Demonstrated teamwork, coordination, and communication skills both locally and globally.
• Demonstrated IPC PWB design principles knowledge.
• Demonstrated ability to lead and supervise a team of eCAD designers or external vendors.
• Demonstrated experience with circuit stack-ups and routing with 2 to 14+ layers.
• Experience with Cadence CAD capture and design tools
• Demonstrated experience with micro-vias, very fine pitch devices, and high-density processors/FPGAs (>1000 contact BGAs)
• Demonstrated experience with signal integrity constraints management.

Roles & Responsibilities:

• Packaging circuit boards into mechanical enclosures and assemblies leveraging Cadence Design tools and IPC standards.
• Guide engineers in component selection, placement, stack-up and material cost, routing, in-circuit test point location, artwork generation, assembly drawing creation, manufacturing documentation, archival and configuration control
• Work with global suppliers and create design outputs with a global team.
• Review external supplier layout designs to ensure high quality, as needed.
• Take ownership for business objectives including delivery, EHS, productivity, cost management, serviceability, quality. 
• Little to no direction is given in execution of job-related activities.
• Comply with EHS regulations and policies.