Design Engineer

The successful candidate(s) will focus on Design and Verification flow development. This will involve learning and automation work on any number of tasks throughout the ASIC development cycle.

Design Flow Tasks:

Perform logic design for the integration of cell libraries, functional units and sub-systems into SoC full chip designs

Perform Register Transfer Level (RTL) design and simulation for SoCs

Contribute to the development of multidimensional designs involving the layout of complex integrated circuits

Perform all aspects of the SoC design flow from high-level design synthesis to place and route, timing and power to create a design database that is ready for manufacturing

Analyze equipment to establish operation infrastructure, conduct experimental tests, and evaluates results

Verification Flow Tasks:

Ensure that the SoC meets the quality needs and requirements of our internal and external customers

Work closely with a wide variety of system disciplines (SoC designers, micro-architects, firmware, etc.) in order to understand the use cases and to create a test and execution plan, ensuring that Solidigm’s products will be successful

Use industry-standard methodologies such as UVM, embedded C-based FW co-simulation, and formal property verification

Continuously investigate new tools and technologies

Qualifications

We are looking for enthusiastic individuals with outstanding communication skills, and a desire to learn. The candidate must have a strong interest in working with people to solve problems.

Minimum Qualifications for junior positions:

Strong debugging and problem-solving skills

Excellent written and verbal communication skills

Linux and Git experience

Languages: Python, Make, SystemVerilog (or VHDL)

Project-based teamwork experience

Fundamental digital logic design skills

Object-oriented programming experience

Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent

Additional Valued Qualifications:

Leadership skills

Deeper understanding and experience with ASIC Design and/or Verification methodologies.

Experience with Open Source and CI/CD