Design Verification Engineer

Summary:

We are looking for individuals with experience in HW emulation and prototyping required to build System on Chip (SoC) and IP for data center applications.

Responsibilities:

Develop emulation testbenches in System Verilog and/or C/C++

Deliver emulation and prototyping models from RTL on industry standard emulation and prototyping platforms.

Build and execute emulation test plan to ensure quality of the models and assist pre-silicon validation.

Drive emulation methodologies for HW verification and SW development.

Develop emulation tools, workflows and infrastructure in collaboration with RTL, verification, validation and SW teams for productivity during debug, runtime, and data analysis of results from emulation runs.

Bringup and debug PCIe, DDR and generic SOC interfaces.

Develop emulation validation components for validation efficiency in testing, debug and automation.

Develop and drive improvements using the latest emulation technology from industry.

Partner with vendors to debug issues and deploy new emulation capabilities.

● Top 3 must-have HARD skills:

1 Have worked on Emulation model building in either Palladium/Zebu/Veloce/HAPS/Protium

2 Has coding skill in Verilog or Systemverilog

3 Has demonstrable scripting skill in Python or Shell

● Good to have skills:

1 Has relevant understanding of SOC interfaces such as PCIe. DDR. JTAG etc

2 Has supported users or actively done bring up or testing in an HW ASIC company.

Minimum Qualifications

- 5 or more

- BS/MS in Electrical or Computer Engineering

B.S. or M.S. degree in Computer Engineering, Computer Science or Electrical Engineering

Track record of ‘first-pass success’ in ASIC where emulation is one of the key validation tools

Knowledge of current emulation technologies (preferred: Palladium/Protium) and methods, including simulation acceleration, in-circuit emulation, speed bridges, virtual prototyping, hybrid methods

Understanding of compilation and build flow, able to build images from scratch with necessary design modifications to adapt to emulation

Experience managing multiple design releases and working with cross functional teams to support and debug customer issues

Experience with EDA tools and scripting languages (Python, Tcl preferred) used to build tools and flows for complex emulation environments

Able to interface with the design, verification, validation and software development teams and understand their needs from an emulation perspective

Preferred Qualifications

Experience with verification, SoCs or similar designs

Architecting emulation systems for various design scales (IP blocks, SOC, multi-chip system) with an understanding of tradeoffs between performance and ease of debug

Experience with SystemVerilog and C++ to model RTL components and transactors

Post-silicon bringup, debug and reproducing issues on emulator

Comments for Suppliers: