Description

About the job

· 10+ years of experience/concept on all aspects of DFT i.e. SCAN/ATPG, MBIST, Boundary Scan.

· DFT logic integration and verification.

· Experience in debugging low coverage and DRC fixes

· Gate Level ATPG simulation with and without timing.

· Pattern generation, verification, and delivery to ATE team.

· Post silicon debug and support on failing patterns.

· Good experience with tools from Synopsys like TestMAX

· Develop/automate flows and scripts in Perl/Tcl to enhance the DFT methodologies & process

· Excellent problem-solving and debugging skills. Proactive in nature.

· Leading junior teams, Mentoring/Training, and Project leadership.

· Excellent Customer interaction, Communication, and Teamwork skills

Education

Any Graduate