Experienced Verification Engineer

Job Overview:

We have a great opportunity for a highly motivated experienced Verification Engineer to join a fast-growing team and develop our next generation of performance / low power GPUs.

As an important member of our development team you'll predominantly be involved with employing constrained-random coverage driven simulation techniques using SystemVerilog and UVM. You'll be responsible for adopting new methodologies to improve how we do IP verification in collaboration with other experienced engineers across our team.

Responsibilities:

The role covers the development and deployment of methodologies as well as direct hands-on test bench development. Your main day-to-day responsibilities will be:

• Full ownership of verification from the test planning phase to project closure.
• Keeping verification environments up to date with the latest methodology and adopting new tools for maintaining a high level of code quality.
• Reviewing other team members' proposed changes to both RTL and verification code.
• Continuously improving the verification effort by keeping a keen eye on collected metrics, employing data science where possible to get the most out of each spent CPU cycle.

Required Skills and Experience:

• Experience verifying sophisticated design IP.
• You're comfortable using UVM and SVA to develop re-usable verification components and are familiar with the tools and processes for developing test benches as well as all other aspects of the verification process.
• Good interpersonal skills and ability to work well as part of a team.
• Experience with owning all stages of a project.

“Nice To Have” Skills and Experience:

• Experience with formal verification.
• Knowledge of graphics principles.
• Experience with scripting (Linux, Python).
• Knowledge of C / C++ / Java / C# / other high-level programming languages.
• Experience with Functional Safety aspects of Design / Verification, knowledge of ISO 26262
• Experience with Cyber Security, knowledge of ISO 21434