IP/SS pre-Sil verification lead

Responsibilities:

Verification Planning: Develop verification plans for IP blocks and sub-systems based on design specifications and project requirements
Team Leadership: Lead and manage a team of verification engineers responsible for verifying IP blocks and sub-systems using industry-standard methodologies and tools
Testbench Development: Oversee the creation of verification environments and testbenches for IP blocks and sub-systems using languages like SystemVerilog and methodologies like Universal Verification Methodology (UVM)
Test Case Development: Guide the team in writing and executing test cases to verify functionality, performance, and compliance with design specifications
Coverage Analysis: Define and track coverage metrics to ensure comprehensive verification of IP blocks and sub-systems, including functional coverage, code coverage, and assertion coverage
Debugging and Issue Resolution: Assist in debugging verification failures, analyzing issues, and proposing solutions to improve verification quality and efficiency
Collaboration: Collaborate with design teams, architecture teams, and other stakeholders to understand design requirements, resolve issues, and ensure successful verification of IP blocks and sub-systems
Documentation: Maintain documentation related to verification plans, test cases, coverage reports, and verification results to track progress and ensure compliance with project timelines

Qualifications:

Education: Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field
Experience: Several years of experience in pre-silicon verification of IP blocks and sub-systems, including experience in a leadership or lead role
Verification Tools and Methodologies: Proficiency in using industry-standard verification tools such as Synopsys VCS, Cadence Incisive, Mentor Questa, etc., and familiarity with verification methodologies like UVM, OVM, and constrained random testing
Programming Languages: Strong programming skills in languages like SystemVerilog, C/C++, Perl, or Python for testbench development and automation
Communication Skills: Excellent communication and teamwork skills to collaborate effectively with cross-functional teams, present technical information, and lead discussions on verification strategies and results
Problem-Solving: Strong analytical and problem-solving skills to identify and resolve verification challenges, debug issues, and optimize verification processes
Industry Knowledge: Understanding of semiconductor industry standards, protocols, and best practices in IP verification and sub-system verification