R&D Engineer

The Space & Communication (S&C) division specializes in the mastery of satellite telecommunications and space explorations at the service of prestigious partners such as ESA, NASA, CNES or JAXA by mastering microwave links (Satellite Antenna and broadcast channels). /Hyper reception) or High Speed ​​Modems for space imaging and satellite control. As part of its research activities focused on spatial optical data links, SDS offers a final year master's internship to a student to study the implementation of a new equalization algorithm on its FPGA platform embedded in a high-speed receiver. As such, you will be required to review the state of the art on this topic, then to understand a first Matlab implementation of the targeted algorithm, to finally implement it on an FPGA target. A C implementation then HLS synthesis could also be considered During your internship, your main missions will be as follows: - Understand how the reception chain works - Understand the Matlab code to implement on target - Analyze and refine the algorithm according to fixed constraints (FPGA clock, upstream parallelization, chosen sampler, quantification, etc.) - Target application (knowledge of FPGA and VHDL required). - Measure performance on an optical bench representative of the Trans atmospheric link

Job Requirements You are preparing for the final year of an engineering or master's degree (IMT Atlantique, Supelec, ENSEIRB, etc.). You master FPGA technologies, VHDL language and Matlab. If you are comfortable with the C/C++ language and/or general knowledge of digital communication, that is a plus. You are curious and conscientious in your work and organized in your code.