Description

About the job

  • 3+ years of hands-on experience in design verification for digital designs.
  • Strong knowledge of verification methodologies such as UVM (Universal Verification Methodology) or OVM (Open Verification Methodology).
  • Proficiency in using industry-standard verification tools such as Questa, VCS, or ModelSim.
  • Experience with scripting languages like Python, Perl, or TCL for automation tasks.
  • Solid understanding of digital design principles, RTL coding (Verilog/VHDL), and simulation environments.
  • Familiarity with industry-standard protocols and interfaces such as PCIe, USB, Ethernet, DDR, etc.
  • Excellent problem-solving and debugging skills.
  • Strong communication and collaboration skills to work effectively in a team environment.

Education

Any Graduate