Senior FPGA Engineer

JOB DETAILS
Primary/Essential Duties:
•    Product Specifications: Implement innovative approaches and develop clearly written design specifications that ensure DDC’s products are designed to succeed in the market relative to their technical performance, feature set, cost and time to market goals.
•    Architecture: Facilitate the design of complex products by leading and coordinating engineering teams of varied technical disciplines through clearly documented architectural level design documents. Lead the decision and tradeoff process for issues that cross hardware/software or other technical discipline boundaries. 
•    Design (and Develop): Perform original and innovative hardware design and distill large-scale designs into architectural elements that facilitate the division of design work to teams of two or more engineers.
•    Planning: Develop plans, schedules, and identify resources required to develop products from market requirement through product release. Identify risk areas and develop contingency plans to eliminate or mitigate risk that could result in schedule delays or failure to meet specification or design plan requirements.
•    Innovation: Conceive methods for achieving product requirements and specifications using appropriate hardware architecture and design techniques.  Anticipate possible difficulties and develop alternate methods.
•    Maintenance: Provide support for maintaining existing products by investigating and resolving defect reports, creating documentation, and creating and releasing new versions of hardware packages.
•    Continuous Improvement: Take the initiative to research, develop, propose, evaluate and/or implement new methods, processes, techniques, tools, components, or technology that improve quality, timeliness and/or performance of DDC’s products or the efficiency or cost effectiveness of DDC’s engineering work. Modify existing SOPs or create new SOPs to implement new processes.

Job Qualifications - Education/Experience
•    Bachelor’s Degree in Electrical Engineer
•    7-10 years relevant work experience required
•    Strong RTL coding/simulation/debug capabilities using VHDL and/or Verilog (VHDL preferred)
•    Experience with RTL simulation, Synthesis, and Static Timing Analysis in one or more of the following toolsets: Xilinx Vivado, Altera/Intel Quartus, Lattice Diamond, and Microsemi Libero
•    Strong Knowledge of CCA design specifying mixed-signal technology circuits consisting of processors, I/O communications, and programmable logic devices (FPGA, CPLD)
•    Schematic capture experience in Cadence OrCad is desirable
•    Experience with multiple networking protocols including PCIe, 1G/10G Ethernet, 1394, Fibre Channel
•    Strong skills and experience in troubleshooting hardware/firmware issues using software and hardware tools
•    Experience with MIL-STD-1553 and ARINC-429 is highly desirable