Description

About the job
Required

BS, MS or PhD degree in CS, CE or EE (or equivalent experience)
It will be modeling at block and soc level, systemC TLM2 modeling; and also looking for NoC, and platform architect experience
Experience of modeling any of following SoC elements in C/C++, and frameworks like SystemC, TLM, gem5, QEMU
NoC, Memory controller, Cache-subsystem, MMU, TLB, PCIe Interface
Moderate proficiency building test plans, check in procedures, and working with source control systems like git and/or perforce.
Familiarity with memory trace formats – parquet, dynamo RIO.


Nice to have

Knowledge of memory validation and electrical validation of DDR protocol and related firmware/BIOS/MRC.
Knowledge of PCIe and/or CXL protocols.
Experience of writing and maintaining FW for DDR and/or flash related memory technologies.
Strong firmware development and debugging skills in C in embedded environments.
Knowledge of x84 platform architectural elements that use PCIe interface (RC, Switches, EP relationships and interconnections).

Education

Any Graduate