Description

Qualifications

  • Strong experience in digital design and verification methodologies and tools such as SystemVerilog, UVM
  • Experience with silicon bring-up, debug, and characterization
  • Experience leading and managing technical teams to deliver quality ASIC products
  • Excellent written and verbal communication skills
  • Bachelor's or Master's degree in Electrical Engineering, Computer Science, or related field
  • Experience in behavioral modeling, scripting languages such as Perl or Python, and ASIC design is a plus

Key Skills

Perl Python SystemVerilog UVM ASIC design

Education

Any Graduate

  • Posted On: Few Days Ago
  • Experience: 5+
  • Openings: 1
  • Category: Technical Lead
  • Tenure: Any